The present disclosure relates to driver circuits configured to reduce high frequency noise, and is applicable to, in particular, booster circuits, etc.
In recent years, for flash memories, which are a type of nonvolatile storage devices, there has been a demand for data read operation and data rewrite operation which are performed with a single power supply voltage, low power supply voltages, or within a range from a low power supply voltage to a high power supply voltage. To perform each operation, an on-chip booster circuit for supplying a boosted voltage or a negative boosted voltage is required. On the other hand, for semiconductor devices to which the flash memories are mounted, there has been a demand for a reduction in high frequency noise, and improvement of high frequency noise resistance.
Generally, the boosted current capability ipp of a booster circuit is expressed by fosc×Cp×VL, where fosc is the booster clock frequency, Cp is the boosting capacitor, and VL is the potential difference between an upstream stage and a downstream stage of a boosting cell when boosting is performed. In conventional booster circuits, a boosting capacitor is pumped in synchronization with a relatively high booster clock frequency in order to obtain a high boosted current capability. For this reason, the current capability of a transistor of a driver circuit pumping the boosting capacitor is increased in order to ensure a sufficient margin for a charge transfer time period to alleviate boosting efficiency degradation. Thus, during logic transition of the driver circuit, a relatively large amount of current flows from a power supply terminal in a direction of the boosting capacitor, or from the boosting capacitor in a direction of ground in a short period of time. A relatively high rate of change in amount of the current acts as high frequency noise, which reduces operating margins of other circuits. Therefore, reducing the rate of change in amount of the current at the power supply terminal and ground generated by the driver circuit of the booster circuit has been a technique required to ensure the operating margins of other circuits.
To reduce the rate of change in amount of the current flowing through the driver circuit of the booster circuit, outputs of inverter circuits which are different from each other in size may be applied to gates of p-channel and n-channel transistors of the driver circuit of the booster circuit (see, for example, Japanese Patent Publication 2002-171747). Here, properly setting the size of each inverter circuit can extend a time period during which the p-channel and n-channel transistors transition from a non-conductive state to a conductive state. As a result, the rate of change in amount of the current flowing through the driver circuit decreases, so that high frequency noise can be reduced.